EPM3064ATC44-10N vs EPM3064ATC44-7N Perbandingan

Perbandingan bersamaan detil EPM3064ATC44-10N dari Altera dan EPM3064ATC44-7N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM3064ATC44-10N EPM3064ATC44-7N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Obsolete
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 1250 1,250
Macro Cells 64 64
User I/O Pins 34 34
Logic Array Blocks (LABs) 4 —
Pin-to-Pin Delay (tPD) 10 ns 7.5 ns
Maximum Counter Frequency 192.3 MHz 192.3 MHz (-7 grade)
Supply Voltage (VCCINT) 3.3 V —
I/O Standard MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) —
Configuration Memory EEPROM (non-volatile) —
In-System Programming IEEE Std. 1532 compliant —
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) compliant —
Paket TQFP-44 (10x10 mm) 44-pin TQFP
Tipe Mounting Surface Mount Surface Mount
Suhu Kerja 0C to +70C (commercial) 0°C to +85°C (commercial)
Status RoHS Compliant Compliant
Pin-Locking Yes (across design iterations) —
Logic Array Blocks — 2
Jumlah Pin — 44
Speed Grade — -7 (7.5 ns pin-to-pin delay)
Supply Voltage (VCC) — 3.3 V
MultiVolt I/O — 1.8 V / 2.5 V / 3.3 V
Programmability — EEPROM, in-system programmable (ISP)
JTAG Interface — IEEE Std. 1149.1 compliant
ISP Standard — IEEE Std. 1532 compliant
Boundary-Scan Test (BST) — Built-in, JTAG-driven

Spek dan Sumber

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