EPM3128ATC144-7N vs EPM3128ATI144-7N Perbandingan

Perbandingan bersamaan detil EPM3128ATC144-7N dari Altera dan EPM3128ATI144-7N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPM3128ATI144-7N EPM3128ATI144-7N - 128 Macrocell CPLD, 129.9MHz, 3.3V | Altera MAX 3000A

EPM3128ATI144-7N - 128 Macrocell CPLD, 129.9MHz, 3.3V | Altera MAX 3000A

EPM3128ATI144-7N ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EPM3128ATC144-7N EPM3128ATI144-7N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Waktu Pembelian Terakhir
Harga Unit (USD) $9,25 —
Series MAX 3000A —
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture EEPROM-based, MAX architecture —
Number of Macrocells 128 —
Number of Usable Gates Up to 10,000 —
User I/Os 96 —
Jumlah Pin 144 —
Paket TQFP-144 (20 x 20 mm, 0.5 mm pitch) 144-pin TQFP
Logic Family CMOS —
Propagation Delay (tPD) 7.5 ns (pin-to-pin, -7 speed grade) —
Counter Frequency Up to 227.3 MHz —
Core Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Supply Voltage (VCCIO) 2.5 V / 3.3 V / 5.0 V (MultiVolt) 3.3 V / 2.5 V / 1.8 V
Suhu Kerja 0 °C to +70 °C (commercial) -40C to +85C (industrial)
In-System Programmability (ISP) Yes, via JTAG (IEEE 1149.1) —
PCI Compliance Compatible with PCI Local Bus Specification Rev. 2.2 —
Tipe Mounting Surface Mount (SMD/SMT) —
Status RoHS Lead-free (-7N suffix indicates Pb-free finish) —
Family — MAX 3000A
Logic Capacity — 2.5K gates
Macrocells — 128
Maximum Frequency (fMAX) — 129.9 MHz
Pin-to-Pin Propagation Delay — 7.5 ns (speed grade -7)
User I/O Pins — 96
Programmable Logic Technology — CMOS EEPROM
Programming Interface — JTAG (IEEE Std 1149.1) in-system programmable
Terminal Pitch — 0.5 mm
JEDEC Package Code — S-PQFP-G144
MultiVolt I/O — Yes (interfaces with 5.0V/3.3V/2.5V/1.8V logic)

Spek dan Sumber

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