EPM3512AFC256-18 vs EPM3512AFC256-19 Perbandingan
Perbandingan bersamaan detil EPM3512AFC256-18 dari Altera dan EPM3512AFC256-19 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM3512AFC256-18 - MAX 3000A CPLD, 512 Macrocells, BGA-256 | Altera
EPM3512AFC256-18 ObsoletePerbandingan Spesifikasi
| Parameter Umum | EPM3512AFC256-18 | EPM3512AFC256-19 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O Pins | 212 | — |
| Pin-to-Pin Delay (tPD1) | 18 ns | — |
| Global Clock Networks | 4 | — |
| VCCINT (Core Supply) | 3.0 V to 3.6 V (3.3 V typical) | — |
| VCCIO (I/O Supply) | 2.5 V or 3.3 V (MultiVolt) | — |
| Suhu Kerja | [DATA_NEEDED: industrial/commercial grade] | -40C to +85C (industrial) |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1532 / JTAG (IEEE Std. 1149.1) | — |
| Paket | 256-ball FineLine BGA (FCBGA) | 256-ball FineLine BGA (FC) |
| Ball Pitch | 1.0 mm | — |
| Status RoHS | [DATA_NEEDED: not specified in retrieved data] | [DATA_NEEDED: RoHS status] |
| Tipe Mounting | Surface Mount | Surface Mount |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 10000 |
| Maximum Operating Frequency | — | 80 MHz |
| Pin-to-Pin Delay (tPD) | — | 7.5 ns |
| Speed Grade | — | -19 |
| User I/O Pins | — | 208 |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Supply Voltage VCCIO | — | 2.5 V or 3.3 V (5.0 V tolerant inputs) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP (IEEE 1532) |
| Process Technology | — | 0.30 µm CMOS EEPROM |
| Non-volatile Configuration | — | Yes (EEPROM-based) |