EPM3512AQC208-10NS vs EPM3512AQC208-15N Perbandingan
Perbandingan bersamaan detil EPM3512AQC208-10NS dari Altera dan EPM3512AQC208-15N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM3512AQC208-15N - 512-Macro CPLD MAX 3000A PQFP-208 | Altera
EPM3512AQC208-15N ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EPM3512AQC208-10NS | EPM3512AQC208-15N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Waktu Pembelian Terakhir |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 512 | 512 |
| Usable Gates | 10,000 | — |
| Logic Array Blocks (LABs) | 12 | 16 |
| User I/Os | 172 | — |
| Pin-to-Pin Delay (tPD) | 10 ns (speed grade -10) | 15 ns |
| Internal Counter Frequency | 227.3 MHz max | — |
| Propagation Delay | 7.5 ns (datasheet figure) | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | 2.5 V / 3.3 V (MultiVolt) |
| Logic Family | CMOS, EEPROM-based | — |
| Configuration | Non-volatile EEPROM, in-system programmable (JTAG IEEE 1532) | — |
| Paket | 208-pin PQFP | PQFP-208 (QC208) |
| Suhu Kerja | 0C to +70C (commercial) | 0C to +70C (commercial) |
| ISP Standard | IEEE Std. 1532 | — |
| Status RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Tipe Mounting | Surface Mount | Surface Mount |
| Maximum User I/O Pins | — | 172 |
| Typical Usable Gates | — | 12,000 |
| Number of Logic Elements | — | 512 |
| Operating Supply Voltage (VCCINT) | — | 3.3 V |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI (with external resistor) |
| In-System Programmability | — | Yes (IEEE Std. 1532 compliant) |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG Support | — | Yes (BST/Boundary-Scan Test) |