EPM3512AQC208-7N vs EPM3512AQC208-2 Perbandingan
Perbandingan bersamaan detil EPM3512AQC208-7N dari Altera dan EPM3512AQC208-2 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Altera
EPM3512AQC208-7N - 512-Macro MAX 3000A CPLD, 208-PQFP | Altera
EPM3512AQC208-7N ⚠ Waktu Beli TerakhirPerbandingan Spesifikasi
| Parameter Umum | EPM3512AQC208-7N | EPM3512AQC208-2 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Waktu Pembelian Terakhir | Obsolete |
| Family | MAX 3000A | MAX 3000A |
| Logic Capacity | 512 macrocells, 10,000 usable gates | — |
| Logic Array Blocks (LABs) | 32 | 16 |
| Macrocells per LAB | 16 | — |
| User I/Os | 172 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Frequency (fCNT) | 116.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | — |
| I/O Bank Count | 4 (MultiVolt) | — |
| Supported I/O Standards | 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS | — |
| Process Technology | 0.30 µm CMOS EEPROM | 0.30 µm EEPROM |
| Configuration | Non-volatile EEPROM, in-system programmable (ISP) | — |
| JTAG Interface | IEEE 1149.1 BST + IEEE 1532 ISP | — |
| Paket | 208-Pin PQFP / FQFP-208 (Plastic Quad Flat Pack, gull-wing) | PQFP-208 (QC) |
| Suhu Kerja | 0 °C to +70 °C (commercial) | — |
| Status RoHS | Compliant | Non-compliant (legacy PQFP) |
| Speed Grade | -7 | -2 |
| Macrocells | — | 512 |
| User I/O Pins | — | 172 |
| Supply Voltage (Core) | — | 3.3 V |
| Output Drive Voltage | — | 2.5 V / 3.3 V programmable |
| Input Voltage Tolerance | — | 2.5 V / 3.3 V / 5.0 V |
| Program/Erase Endurance | — | 100 cycles (typical) |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| User I/O Banks | — | 4 |
| Rentang Suhu Kerja | — | Commercial (0C to +70C) |
| Tipe Mounting | — | Surface Mount |
| Lead-Free | — | No (SnPb lead finish) |
| Security Bit | — | Yes (programmable) |