EPM5128LC2 vs EPM5130LC Perbandingan
Perbandingan bersamaan detil EPM5128LC2 dari Altera dan EPM5130LC dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM5128LC2 | EPM5130LC |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Waktu Pembelian Terakhir | Obsolete |
| Family | MAX 5000 | MAX 5000 (EPM51xx) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | 8 |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 dedicated | 1 |
| Propagation Delay (tPD) | 45 ns | 55 ns |
| Supply Voltage (VCC) | 5 V | 4.5 V to 5.5 V |
| Process Technology | CMOS EPROM | CMOS (0.7 um EPROM) |
| Configuration Memory | On-chip EPROM (non-volatile) | — |
| Boundary Scan | JTAG / IEEE 1149.1 | — |
| Suhu Kerja | -40 C to +85 C (extended commercial) | [DATA_NEEDED: commercial/industrial/military grade] |
| Paket | PGA (Pin Grid Array, ceramic) | JLCC-68 (J-Lead Ceramic Chip Carrier) |
| Tipe Mounting | Through-Hole / Socketed | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic JLCC, contains lead) |
| Series | — | MAX 5000 |
| User I/O Pins | — | 48 |
| Total Inputs (Dedicated + I/O) | — | 68 |
| Dedicated Inputs | — | 19 |
| Maximum Internal Clock Frequency | — | 50 MHz |
| Configuration Technology | — | UV-Erasable / OTP EPROM |
| I/O Standard | — | TTL-compatible |