EPM5128LC2 vs EPM5192-1LC Perbandingan

Perbandingan bersamaan detil EPM5128LC2 dari Altera dan EPM5192-1LC dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPM5128LC2 EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EPM5128LC2 EPM5192-1LC
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Waktu Pembelian Terakhir Obsolete
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 128 192
Logic Array Blocks (LABs) 8 4
Interconnect Programmable Interconnect Array (PIA) —
Global Clock Inputs 1 dedicated —
Propagation Delay (tPD) 45 ns —
Supply Voltage (VCC) 5 V —
Process Technology CMOS EPROM UV EPROM, erasable windowless
Configuration Memory On-chip EPROM (non-volatile) —
Boundary Scan JTAG / IEEE 1149.1 —
Suhu Kerja -40 C to +85 C (extended commercial) 0C to +70C (commercial)
Paket PGA (Pin Grid Array, ceramic) 64-pin Ceramic J-Lead Chip Carrier (LC)
Tipe Mounting Through-Hole / Socketed Surface Mount
Status RoHS [DATA_NEEDED: RoHS status] Non-compliant (ceramic windowless package, lead-bearing termination)
Usable Gates — 3,750
User I/O Pins — 64
Maximum Operating Frequency — 62.5 MHz
Propagation Delay (tpd) — [DATA_NEEDED: -1 speed grade tpd in ns]
Tegangan Pemuat — 5 V
Programmable Interconnect — PIA (Programmable Interconnect Array)
JTAG Boundary Scan — IEEE 1149.1 compliant

Spek dan Sumber

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