EPM5192-1LC vs EPM5128LC2 Perbandingan

Perbandingan bersamaan detil EPM5192-1LC dari Altera dan EPM5128LC2 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPM5128LC2 EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EPM5192-1LC EPM5128LC2
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Waktu Pembelian Terakhir
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Usable Gates 3,750 —
Macrocells 192 128
Logic Array Blocks (LABs) 4 8
User I/O Pins 64 —
Maximum Operating Frequency 62.5 MHz —
Propagation Delay (tpd) [DATA_NEEDED: -1 speed grade tpd in ns] —
Tegangan Pemuat 5 V —
Process Technology UV EPROM, erasable windowless CMOS EPROM
Programmable Interconnect PIA (Programmable Interconnect Array) —
JTAG Boundary Scan IEEE 1149.1 compliant —
Paket 64-pin Ceramic J-Lead Chip Carrier (LC) PGA (Pin Grid Array, ceramic)
Tipe Mounting Surface Mount Through-Hole / Socketed
Suhu Kerja 0C to +70C (commercial) -40 C to +85 C (extended commercial)
Status RoHS Non-compliant (ceramic windowless package, lead-bearing termination) [DATA_NEEDED: RoHS status]
Interconnect — Programmable Interconnect Array (PIA)
Global Clock Inputs — 1 dedicated
Propagation Delay (tPD) — 45 ns
Supply Voltage (VCC) — 5 V
Configuration Memory — On-chip EPROM (non-volatile)
Boundary Scan — JTAG / IEEE 1149.1

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