EPM5192GC1 vs EPM5192C-2 Perbandingan
Perbandingan bersamaan detil EPM5192GC1 dari Altera dan EPM5192C-2 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM5192GC1 | EPM5192C-2 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | Complex Programmable Logic Device (CPLD) |
| Macro Cells | 192 | — |
| Usable Gates | 3,750 | — |
| Maximum Operating Frequency | 62.5 MHz | 50 MHz |
| Supply Voltage (VCC) | 5 V | — |
| Programming Technology | UV-Erasable / OTP EPROM | — |
| Package Type | Ceramic PGA (Pin Grid Array) | — |
| Logic Elements | 192 macrocells with AND/OR array | — |
| Process Technology | EPROM-based CMOS | CMOS |
| Suhu Kerja | [DATA_NEEDED: operating temperature range] | — |
| Propagation Delay | [DATA_NEEDED: tpd specification] | — |
| Jumlah Pin | [DATA_NEEDED: pin count for GC1 PGA package] | — |
| Tipe Mounting | Through-hole (PGA) | — |
| Status RoHS | unknown | unknown |
| Development Tool | Altera MAX+PLUS II | — |
| Macrocells | — | 192 |
| User I/O Pins | — | 64 |
| Logic Array Blocks (LABs) | — | 12 |
| Dedicated Inputs | — | 7 |
| External Clock Inputs | — | 1 |
| Propagation Delay (PIA, typical) | — | 45 ns |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programmable Interconnect | — | Programmable Interconnect Array (PIA) |
| Speed Grade | — | -2 |
| Programming Interface | — | JTAG / Altera MAX+ programming |
| Lead-Free | — | unknown |