EPM570ZM256C7N vs EPM570ZM256C6N Perbandingan
Perbandingan bersamaan detil EPM570ZM256C7N dari Altera dan EPM570ZM256C6N dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM570ZM256C7N | EPM570ZM256C6N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Series | MAX II Z | MAX II |
| Family | MAX II | — |
| Logic Elements (LE) | 570 | — |
| Macro Cells | 440 | — |
| User I/Os | 76 | 160 |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Maximum Operating Frequency | 123.5 MHz | — |
| Pin-to-Pin Delay (tPD) | 5.0 ns | — |
| Core Supply Voltage | 1.71 V to 1.89 V (3.3 V with on-chip regulator) | — |
| I/O Supply Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Process Technology | 0.18 µm CMOS | 0.18 micron CMOS, 6-layer-metal flash |
| Suhu Kerja | 0 °C to +85 °C (commercial) | 0C to +85C (commercial) |
| Paket | 256-ball MBGA (Micro FBGA), 0.5 mm pitch, 6 × 6 mm | 256-MBGA (FineLine BGA) 11x11 mm |
| Configuration Method | On-chip non-volatile (instant-on, ISP via JTAG) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan + ISP | — |
| Lead-Free / RoHS | Lead-free / RoHS compliant | — |
| Logic Family | CMOS | — |
| Logic Elements (LEs) | — | 570 |
| Macrocells | — | 440 |
| Pin/Pitch | — | 256 balls, 0.5 mm pitch (Heisener description) |
| Internal Core Voltage | — | 1.71 V to 1.89 V (1.8 V typical) |
| I/O Voltage Standards | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant |
| Propagation Delay (tPD) | — | 9 ns (per Heisener listing for Z speed grade) |
| Programmable Type | — | In System Programmable (Flash, non-volatile) |
| Tipe Mounting | — | Surface Mount (BGA) |
| Status RoHS | — | Lead-free (per Heisener listing) |