EPM7128ELC84-12 vs EPM7128SLC8410 Perbandingan

Perbandingan bersamaan detil EPM7128ELC84-12 dari Altera dan EPM7128SLC8410 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM7128ELC84-12 EPM7128SLC8410
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 7000 (MAX 7000E series) MAX 7000S
Logic Family CMOS, EEPROM-based —
Usable Gates 2,500 —
Macrocells 128 128
Logic Array Blocks (LABs) 8 —
User I/Os 84 —
Propagation Delay (tpd1) 12 ns —
Internal Global Clock Frequency 90.9 MHz —
Setup Time 4.5 ns —
Supply Voltage (VCCINT / VCCIO) 5 V (4.75 V to 5.25 V) —
Suhu Kerja 0C to +70C (commercial) 0C to +70C (commercial)
Paket 84-pin PLCC (J-Lead, QCCJ) 84-pin PLCC (J-lead)
Tipe Mounting Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket or direct solder)
Programming Interface JTAG (IEEE 1149.1) / ISP —
Jumlah Pin 84 —
Status RoHS Non-compliant (legacy 5V part, SnPb finish) [DATA_NEEDED: RoHS status - not stated in verified data]
Product Type — CPLD (Complex Programmable Logic Device)
Logic Elements / Gates — 2500 usable gates
User I/O Pins — 68
Number of Logic Array Blocks (LABs) — 8
Propagation Delay (tPD) — 10 ns
Setup Time (tSU) — 7 ns
Maximum Operating Frequency — 125 MHz (counter)
Supply Voltage (VCCINT) — 4.75 V to 5.25 V (5 V nominal)
I/O Voltage (MultiVolt) — 2.5 V / 3.3 V / 5.0 V
Program Memory Type — EEPROM (in-system programmable)
JTAG Support — IEEE Std 1149.1 boundary-scan

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