EPM9560RC208-18 vs EPM9560RC208-13 Perbandingan

Perbandingan bersamaan detil EPM9560RC208-18 dari Altera dan EPM9560RC208-13 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPM9560RC208-18 EPM9560RC208-18 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-18 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-18 ✗ Akhir Hidup

Perbandingan Spesifikasi

Parameter Umum EPM9560RC208-18 EPM9560RC208-13
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Akhir Hidup Obsolete
Device Family MAX 9000 (EPM9560) MAX 9000 EPLD
Logic Type EEPROM-based Complex Programmable Logic Device (CPLD) —
Usable Gates 12,000 gates 12,000
Macrocells 560 macrocells 560
Propagation Delay (tPD) 18 ns (speed grade -18) 13 ns
Maximum Operating Frequency 117.6 MHz (family -15 grade reference) —
Tegangan Pemuat 5 V 5.0 V
I/O Voltage Compatibility 3.3 V or 5 V —
User I/O Lines 149 I/O lines —
Flip-Flops 772 flip-flops —
Paket 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (Power Quad Flat Pack)
Package JESD-30 Code S-PQFP-G208 —
Tipe Mounting Surface Mount Surface Mount
Configuration Memory EEPROM (non-volatile, no external config PROM) —
Technology CMOS —
Suhu Kerja [DATA_NEEDED: operating temperature range] —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Status Lingkungan Hidup EOL / mature (per Altera product discontinuance notice) —
Logic Array Blocks (LABs) — 20
User I/O Pins — 208
Package Code — RC208
Speed Grade — -13 (13 ns pin-to-pin)
Frekuensi Bawah Maximum — 125 MHz
Configuration Technology — EEPROM (non-volatile)
Programming Interface — IEEE 1149.1 JTAG
Rentang Suhu Kerja — 0C to +70C (commercial)
Lead-Free Status — [DATA_NEEDED: lead-free status]
Level MSL — [DATA_NEEDED: MSL level]

Spek dan Sumber

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