EPM9560RC208-7 vs EPM9560RC208-10 Perbandingan

Perbandingan bersamaan detil EPM9560RC208-7 dari Altera dan EPM9560RC208-10 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM9560RC208-7 EPM9560RC208-10
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family MAX 9000 MAX 9000
Device Type EPLD / CPLD CPLD (Complex Programmable Logic Device)
Usable Gates 560 12,000
Macrocells 16 560
Logic Array Blocks (LABs) 4 16
User I/O Pins 208 —
Pin-to-Pin Delay (tPD) 7 ns (speed grade -7) 10 ns
Maximum Frequency (fMAX) [DATA_NEEDED: fMAX value] [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) 5.0 V 5.0 V
Supply Voltage (VCCIO) 5.0 V (TTL) or 3.3 V (LVCMOS with level translator) —
Process Technology 0.65 um CMOS EEPROM 0.30 µm CMOS EEPROM
Configuration Memory Non-volatile on-chip EEPROM (no boot PROM required) EEPROM (in-system programmable via JTAG)
Programming Interface JTAG (IEEE 1149.1) + Altera ISP —
Paket 208-pin Power Quad Flat Pack (RQFP-208) 208-pin RQFP (Plastic Quad Flat Pack)
Suhu Kerja 0C to +70C (commercial) / -40C to +85C (industrial) 0C to +70C (commercial)
Output Drive Current 160 mA DC sink per pin —
Status RoHS Compliant (ROHS3 per distributor listing) [DATA_NEEDED: not stated in retrieved distributor listings]
Maximum User I/O Pins — 212 (208-pin package variant)
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Tipe Mounting — Surface Mount
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability — JTAG (IEEE 1149.1) in-system programming

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