5CSEBA2U19C6N vs 5CSEBA6U19C6N 比較
詳細な並列比較: 5CSEBA2U19C6N メーカー: Intel および 5CSEBA6U19C6N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | 5CSEBA2U19C6N | 5CSEBA6U19C6N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $74.60 | $194.15 |
| Family | Cyclone V SE SoC FPGA | — |
| Logic Elements | 25 K | 110K |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Clock Frequency | 925 MHz | — |
| DSP Blocks | Variable-precision DSP | Variable-precision DSP |
| パッケージ | 484-pin UBGA (19x19 mm) | 484-UBGA (UBGА, 19x19 mm) |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| Operating Temperature Grade | Commercial (other) | — |
| Memory Interfaces | DDR2, DDR3, LPDDR2 with ECC | — |
| HPS Peripherals | GbE, USB 2.0 OTG, SATA, CAN, UART, SPI, I2C, SD/SDIO/MMC | — |
| L2 Cache | 512 KB shared | — |
| L1 Cache per Core | 32 KB I-cache + 32 KB D-cache | — |
| FPGA-to-HPS Bridges | AXI-32/AXI-64, FPGA-to-SDRAM ports | — |
| Process Technology | TSMC 28 nm low-power | TSMC 28 nm low-power |
| RoHS ステータス | Compliant | Compliant (per Altera/Intel product page) |
| Manufacturer | — | Altera (Intel) |
| Series | — | Cyclone V SE SoC FPGA |
| Device Variant | — | 5CSEA6 (U19 package) |
| HPS Architecture | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Frequency | — | 925 MHz |
| FPGA Speed Grade | — | -6 (industrial) |
| ピン数 | — | 484 |
| User I/O | — | 66 (per Heisener) / configurable LVDS/LVCMOS |
| Hard IP Blocks | — | PCIe Gen2, multi-port memory controller, ARM Cortex-A9 HPS |
| Memory | — | Embedded M10K blocks |
| 動作温度 | — | -40C to +100C (industrial) |
| MSLレベル | — | 3 (per BGA package) |