ADS62P25IRGC25 vs ADS62P28IRGC25 比較
詳細な並列比較: ADS62P25IRGC25 メーカー: Texas Instruments および ADS62P28IRGC25 メーカー: Texas Instruments。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Texas Instruments
ADS62P25IRGC25 - Dual 12-Bit 125 MSPS ADC, 64-VQFN | Texas Instruments
ADS62P25IRGC25 ✓ 生産中Texas Instruments
ADS62P28IRGC25 - Dual 12-Bit 210-MSPS ADC with DDR LVDS/CMOS | TI
ADS62P28IRGC25 ✓ 生産中仕様比較
| パラメータ | ADS62P25IRGC25 | ADS62P28IRGC25 |
|---|---|---|
| ブランド | Texas Instruments | Texas Instruments |
| カテゴリ | ADC/DAC | ADC/DAC |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $32.50 | $17.50 |
| 分解能 | 12 bit | 12 bit |
| Number of Channels | 2 | 2 (dual) |
| Maximum Sample Rate | 125 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Input Type | Differential analog | Differential / Single-ended |
| Output Interface | Parallel CMOS or DDR LVDS (selectable) | DDR LVDS / Parallel CMOS (selectable) |
| No Missing Codes | 12-bit (guaranteed) | — |
| Channel-to-Channel Crosstalk | 95 dB | — |
| Coarse Gain | 3.5 dB | — |
| Programmable Fine Gain | up to 6 dB | — |
| Digital Processing Block | Offset correction, fine gain correction (0.05 dB steps) | — |
| Clock Input | Integrated low-jitter clock buffer | — |
| パッケージ | 64-pin VQFN (RGC), 9x9 mm | 64-VQFN (RGC) 9x9 mm with exposed pad |
| 動作温度範囲 | -40C to +85C (Industrial) | — |
| 実装タイプ | Surface Mount | — |
| MSLレベル | [DATA_NEEDED: MSL Level] | — |
| RoHS ステータス | Compliant | Compliant |
| サンプリングレート | — | 210 MSPS |
| Full-Scale Input Range | — | 1 Vpp to 2 Vpp (programmable) |
| SNR | — | 70 dBFS (typical at 70 MHz IF) |
| SFDR | — | 85 dBc (typical at 70 MHz IF) |
| Analog Supply Voltage | — | 3.3 V |
| Digital Supply Voltage | — | 1.8 V (LVDS mode) |
| Power Dissipation | — | 1.7 W typical |
| Input Bandwidth | — | 450 MHz (3 dB) |
| 動作温度 | — | -40 C to +85 C (Industrial) |