CDK2308CILP64 vs CDK2308DILP64 比較
詳細な並列比較: CDK2308CILP64 メーカー: MaxLinear および CDK2308DILP64 メーカー: MaxLinear。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | CDK2308CILP64 | CDK2308DILP64 |
|---|---|---|
| ブランド | MaxLinear | MaxLinear |
| カテゴリ | ADC/DAC | ADC/DAC |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.85 | $9.85 |
| 分解能 | 10 bit | 10 bit |
| Number of Channels | 2 (dual) | 2 (Dual) |
| Sample Rate (max) | 65 MSPS per channel | — |
| Architecture | Pipelined | Pipelined ADC |
| Input Type | Differential, single-ended capable | Single-ended analog |
| Analog Supply Voltage | 3.3 V | — |
| Digital Output Supply | 1.8 V to 3.3 V | — |
| Digital Output Interface | Parallel CMOS | — |
| Data Rate (per channel) | Up to 65 MSPS | — |
| Reference | Internal bandgap; external reference supported | — |
| Sample-Rate Family | 20 / 40 / 65 / 80 MSPS (per datasheet family) | — |
| パッケージ | 64-pin QFN with Exposed Pad (EP) | 64-QFN (9x9 mm) |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | -40 C to +85 C (industrial) | — |
| RoHS ステータス | Compliant | Compliant |
| Sampling Rate (max) | — | 80 MSPS |
| Supported Sample Rates | — | 20 / 40 / 65 / 80 MSPS (programmable) |
| Power Dissipation | — | 78 mW per channel at 80 MSPS |
| Supply Voltage (AVDD) | — | [DATA_NEEDED: AVDD nominal voltage] |
| Supply Voltage (DRVDD) | — | [DATA_NEEDED: DRVDD nominal voltage] |
| Input Bandwidth | — | [DATA_NEEDED: -3 dB input bandwidth] |
| SNR | — | [DATA_NEEDED: SNR at full scale] |
| SFDR | — | [DATA_NEEDED: SFDR] |
| ENOB | — | [DATA_NEEDED: effective number of bits] |
| 動作温度範囲 | — | -40 C to +85 C |
| MSLレベル | — | [DATA_NEEDED: MSL rating] |
| Power-Down Modes | — | Per-channel standby, chip standby, full power-down |
| Track-and-Hold Amplifier | — | Integrated, optimized for IF frequencies |