EP1810LC-35 vs EP1830-20CFN 比較
詳細な並列比較: EP1810LC-35 メーカー: Rochester Electronics および EP1830-20CFN メーカー: Texas Instruments。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Rochester Electronics
EP1810LC-35 - 48-Macrocell Classic EPLD, 35ns, PLCC-68 | Rochester/Altera
EP1810LC-35 ⚠ ラストタイムバイ仕様比較
| パラメータ | EP1810LC-35 | EP1830-20CFN |
|---|---|---|
| ブランド | Rochester Electronics | Texas Instruments |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $49.20 | $9.85 |
| Device Type | EPLD (Erasable Programmable Logic Device) | Erasable Programmable Logic Device (EPLD) |
| Series | Classic EP1810 | — |
| Macrocells | 48 | — |
| Equivalent Gates | 900 usable / 2100 equivalent | — |
| Maximum Operating Frequency | 28.6 MHz | — |
| Propagation Delay (tpd) | 35 ns (max, '-35' speed grade) | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable EPROM | CMOS EPROM |
| パッケージ | 68-pin PLCC (J-Lead) | PLCC-68 (QCCJ, J-lead) |
| 実装タイプ | Surface Mount (socketable) | — |
| 動作温度 | 0C to +70C (commercial) | — |
| I/O Pins | [DATA_NEEDED: I/O count exact] | 48 |
| Configuration Method | UV-erase + EPROM programmer | — |
| Programmable Interconnect | Centralized Programmable Interconnect Array (PIA) | — |
| Development Tool (legacy) | MAX+PLUS II / A+PLUS | — |
| RoHS ステータス | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED] | — |
| Macrocell Count | — | 48 |
| Propagation Delay (tPD) | — | 22 ns |
| Maximum Supply Voltage | — | 5.25 V |
| Dedicated Inputs | — | 12 |
| Terminal Pitch | — | 1.27 mm |
| Terminal Form | — | J-Bend |
| Package Code | — | QCCJ |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Commercial (0C to 70C) |
| Typical Operating Current | — | 20 mA at 1 MHz |
| Maximum Counter Frequency | — | 50 MHz (4 x 12-bit counters) |
| Speed Grade | — | -20 |
| Configuration Memory | — | Non-volatile EPROM (UV-erasable) |