EP1K10TC100-1N vs EP1K30TC144-1N 比較
詳細な並列比較: EP1K10TC100-1N メーカー: Intel および EP1K30TC144-1N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1K10TC100-1N | EP1K30TC144-1N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.20 | $11.50 |
| Family | ACEX-1K | — |
| Series | EP1K10 | ACEX-1K |
| Logic Elements / Cells | 576 | — |
| Total Gates (typical) | 10,000 | — |
| Embedded RAM Bits | 12,288 bits | — |
| Logic Array Blocks (LABs) | 72 | — |
| Embedded Array Blocks (EABs) | 3 x 4 Kbit | — |
| User I/Os | 66 | — |
| Core Supply Voltage | 2.5 V (2.375 V to 2.625 V) | — |
| 動作温度 | 0 °C to 70 °C (commercial) | [DATA_NEEDED: operating temperature range] |
| Process Technology | 0.22 µm CMOS SRAM | 0.18 µm SRAM |
| パッケージ | 100-pin TQFP (14 mm x 14 mm, 1 mm height) | — |
| 実装タイプ | Surface Mount (gull-wing) | Surface Mount |
| Speed Grade | -1N (commercial, slower tier) | — |
| Configuration Method | SRAM (external PROM required) | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Number of Logic Elements (LEs) | — | 1,728 |
| Typical Gates | — | 30,000 |
| Number of Logic Array Blocks (LABs) | — | 216 |
| Embedded Memory (EAB) | — | 24,576 bits (6 EABs) |
| Number of User I/O | — | 102 |
| Number of I/O Banks | — | 4 |
| Package Type | — | 144-LQFP (TQFP) |
| Core Voltage | — | 2.5 V |
| I/O Voltage | — | 3.3 V (LVCMOS/LVTTL); 2.5 V tolerant |
| Configuration | — | SRAM-based, JTAG (IEEE 1149.1) + serial/parallel passive |
| PLLs | — | 6 (per device family) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSLレベル | — | [DATA_NEEDED: MSL moisture sensitivity level] |