EP1K10TC100-1N vs EP1K30TC144-1N 对比

详细并排对比 EP1K10TC100-1N 出自 Intel 和 EP1K30TC144-1N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP1K10TC100-1N EP1K30TC144-1N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.20 $11.50
Family ACEX-1K —
Series EP1K10 ACEX-1K
Logic Elements / Cells 576 —
Total Gates (typical) 10,000 —
Embedded RAM Bits 12,288 bits —
Logic Array Blocks (LABs) 72 —
Embedded Array Blocks (EABs) 3 x 4 Kbit —
User I/Os 66 —
Core Supply Voltage 2.5 V (2.375 V to 2.625 V) —
工作温度 0 °C to 70 °C (commercial) [DATA_NEEDED: operating temperature range]
Process Technology 0.22 µm CMOS SRAM 0.18 µm SRAM
封装 100-pin TQFP (14 mm x 14 mm, 1 mm height) —
安装类型 Surface Mount (gull-wing) Surface Mount
Speed Grade -1N (commercial, slower tier) —
Configuration Method SRAM (external PROM required) —
JTAG Support Yes (IEEE 1149.1 boundary-scan) —
RoHS 状态 Compliant [DATA_NEEDED: RoHS compliance status]
Number of Logic Elements (LEs) — 1,728
Typical Gates — 30,000
Number of Logic Array Blocks (LABs) — 216
Embedded Memory (EAB) — 24,576 bits (6 EABs)
Number of User I/O — 102
Number of I/O Banks — 4
Package Type — 144-LQFP (TQFP)
Core Voltage — 2.5 V
I/O Voltage — 3.3 V (LVCMOS/LVTTL); 2.5 V tolerant
Configuration — SRAM-based, JTAG (IEEE 1149.1) + serial/parallel passive
PLLs — 6 (per device family)
Lead-Free — [DATA_NEEDED: lead-free status]
MSL 等级 — [DATA_NEEDED: MSL moisture sensitivity level]

数据手册与资源

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