EP1K30QC208-1 vs EP1K30QC208-3 比較
詳細な並列比較: EP1K30QC208-1 メーカー: Intel および EP1K30QC208-3 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1K30QC208-1 | EP1K30QC208-3 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.85 | $9.75 |
| Device Family | ACEX-1K | — |
| Logic Elements (LEs) | 1,728 | — |
| Equivalent Gates | 30,000 | — |
| Logic Array Blocks (LABs) | 216 | — |
| Embedded Memory (EAB) | 24,576 bits | — |
| Maximum User I/O | 147 | 147 |
| Core Supply Voltage (VCCINT) | 2.5 V (2.375 V to 2.625 V) | — |
| パッケージ | 208-BFQFP (Plastic Quad Flat Pack, PQFP208) | 208-pin PQFP (Plastic Quad Flat Pack) |
| Terminal Pitch | 0.500 mm | — |
| 実装タイプ | Surface Mount (gull-wing leads) | Surface Mount |
| 動作温度 | 0 °C to +70 °C (commercial) | 0C to +70C (commercial) |
| Maximum Operating Frequency | up to 250 MHz (family typical) | — |
| Process Technology | 2.5 V CMOS | SRAM-based LUT, 0.18 um |
| Configuration Method | SRAM, in-system reconfigurable (volatile) | — |
| Boundary-Scan Test | JTAG IEEE 1149.1 | — |
| I/O Voltage Support | 2.5 V / 3.3 V (multi-volt I/O) | — |
| Configuration Device Support | EPC2, EPC4, EPC8 Enhanced Configuration Devices | — |
| RoHS ステータス | Compliant (lead-free) | [DATA_NEEDED: RoHS compliance status] |
| Family | — | ACEX-1K |
| Logic Elements | — | 1,728 |
| Typical Gates | — | 30,000 |
| Maximum System Gates | — | 119,000 |
| Embedded Array Blocks (EABs) | — | 6 |
| Total RAM Bits | — | 24,576 |
| Core Voltage | — | 2.5 V |
| Speed Grade | — | -3 |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI |
| Programming Interface | — | IEEE 1149.1 JTAG, ByteBlaster |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |