EP1M120B484C5 vs EP1M120B484C8A 比較
詳細な並列比較: EP1M120B484C5 メーカー: Intel および EP1M120B484C8A メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1M120B484C5 | EP1M120B484C8A |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $65.00 | $62.00 |
| Family | Mercury (EP1M) | Mercury (EP1M) |
| Logic Elements | 4,800 | — |
| Typical Gates | 120,000 | — |
| Maximum User I/O | 303 | [DATA_NEEDED: user I/O count] |
| パッケージ | FineLine BGA-484 (19 mm x 19 mm, 1.0 mm pitch) | 484-ball FineLine BGA |
| 動作温度 | 0C to +85C (commercial) | [DATA_NEEDED: full range] |
| Speed Grade | 5 (slowest) | 8 |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.18 um CMOS | — |
| PLLs | 4 | — |
| Embedded RAM Bits | 49,152 | — |
| True LVDS Channels | Up to 34 pairs | — |
| Maximum LVDS Data Rate | 840 Mbps per channel | — |
| Configuration Scheme | Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG | — |
| Peak Reflow Temperature | 220 C | 220 C (per JEDEC J-STD-020) |
| Lead-Free / RoHS | SnPb ball finish (non-RoHS by default) | — |
| Multipliers | Embedded in system blocks for DSP | — |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| Logic Elements (approx.) | — | 120 |
| ピン数 | — | 484 |
| Temperature Grade | — | Commercial (C) |
| Logic Blocks | — | [DATA_NEEDED: LAB count] |
| Embedded Memory | — | [DATA_NEEDED: RAM bits] |
| Supply Voltage Core | — | [DATA_NEEDED: VCCINT] |
| Supply Voltage I/O | — | [DATA_NEEDED: VCCIO] |
| Configuration Method | — | [DATA_NEEDED: SRAM/serial/etc.] |
| RoHS ステータス | — | [DATA_NEEDED: check distributor] |
| MSLレベル | — | [DATA_NEEDED: per JEDEC J-STD-020] |