EP1S10F672C7N vs EP1S10B672C7 比較
詳細な並列比較: EP1S10F672C7N メーカー: Altera および EP1S10B672C7 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S10F672C7N | EP1S10B672C7 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $171.00 | $140.00 |
| Series | Stratix | Stratix |
| Logic Elements / Cells | 10,570 | — |
| Number of LABs/CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of User I/Os | 345 | — |
| Number of Gates | [DATA_NEEDED: total gate count] | — |
| DSP Blocks | 6 | Yes (DSP multiplier blocks) |
| Package Type | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch | 672-ball FineLine BGA |
| 実装タイプ | Surface Mount | Surface Mount |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 420.17 MHz | — |
| 動作温度 | 0C to +85C (Commercial) | 0 °C to 85 °C (Commercial) |
| Configuration Method | SRAM, JTAG, passive/active serial/parallel | JTAG / EPC serial configuration |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| MSLレベル | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements | — | 10,570 |
| Embedded Memory (Total) | — | 920 Kbits |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| Supply Voltage (Core) | — | 1.5 V |
| Package Dimensions | — | 35 x 35 mm |
| Ball Pitch | — | 1.27 mm |
| Logic Family | — | CMOS |
| Temperature Grade | — | Commercial (C) |
| Speed Grade | — | 7 |