EP1S10F672C7N vs EP1S10B672C7 Comparaison
Comparaison détaillée côte à côte de EP1S10F672C7N par Altera et EP1S10B672C7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP1S10F672C7N | EP1S10B672C7 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $171,00 | $140,00 |
| Series | Stratix | Stratix |
| Logic Elements / Cells | 10,570 | — |
| Number of LABs/CLBs | 1,057 | — |
| Total RAM Bits | 920,448 | — |
| Number of User I/Os | 345 | — |
| Number of Gates | [DATA_NEEDED: total gate count] | — |
| DSP Blocks | 6 | Yes (DSP multiplier blocks) |
| Package Type | 672-BBGA (FBGA) 35 x 35 mm, 1.27 mm pitch | 672-ball FineLine BGA |
| Type de montage | Surface Mount | Surface Mount |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 420.17 MHz | — |
| Température de fonctionnement | 0C to +85C (Commercial) | 0 °C to 85 °C (Commercial) |
| Configuration Method | SRAM, JTAG, passive/active serial/parallel | JTAG / EPC serial configuration |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| Niveau MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements | — | 10,570 |
| Embedded Memory (Total) | — | 920 Kbits |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| Supply Voltage (Core) | — | 1.5 V |
| Package Dimensions | — | 35 x 35 mm |
| Ball Pitch | — | 1.27 mm |
| Logic Family | — | CMOS |
| Temperature Grade | — | Commercial (C) |
| Speed Grade | — | 7 |