EP1S20F484C6N vs EP1S10F484C5N 比較
詳細な並列比較: EP1S20F484C6N メーカー: Intel および EP1S10F484C5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S20F484C6N | EP1S10F484C5N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $440.00 | $52.00 |
| Family | Stratix | Stratix (original) |
| Logic Elements | 18,460 | — |
| Embedded Memory | 1,669,248 bits | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| User I/O Pins | 361 | — |
| パッケージ | 484-Ball FCBGA (23 x 23 mm, 1.0 mm pitch) | 484-ball FCBGA (F484), 23 x 23 mm, 1.0 mm pitch |
| Process Technology | 130 nm CMOS | 0.13 µm CMOS |
| Core Supply Voltage | 1.5 V | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O voltage - check datasheet] | — |
| 動作温度 | 0 C to 85 C (Commercial) | — |
| Speed Grade | 6 | — |
| Maximum Internal Clock | 450.05 MHz | — |
| Configuration Interface | JTAG (IEEE 1149.1), Serial/Parallel (AS/PS) - EPC device compatible | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: confirm via Intel product page] | — |
| Lead-Free | [DATA_NEEDED: confirm] | — |
| Series | — | Stratix |
| Logic Elements (LEs) | — | 10,570 |
| Logic Array Blocks (LABs) | — | 1,057 |
| Embedded Memory Bits | — | 920,448 |
| TriMatrix Memory Blocks | — | 14 |
| Embedded DSP Blocks | — | 6 (≈48 9-bit multipliers) |
| PLLs | — | 4 |
| Global Clock Networks | — | 12 |
| Maximum User I/O | — | 335 |
| User I/O Standard Support | — | LVDS, LVPECL, PCI-X, RapidIO, DDR |
| Core Voltage (VCCINT) | — | 1.5 V |
| Maximum Internal Frequency | — | 500 MHz (per Stratix datasheet) |
| Operating Temperature (TJ) | — | 0 °C to 85 °C (Commercial) |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |
| Device Status | — | Obsolete - last time buy completed |
| Design Toolchain | — | Quartus II (≤ v13.0) |