EP1S60F1020C7 vs EP1S60F1020C6 比較
詳細な並列比較: EP1S60F1020C7 メーカー: Altera および EP1S60F1020C6 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP1S60F1020C7 | EP1S60F1020C6 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $1,750.00 | $105.00 |
| Series | Stratix | EP1S60 |
| Family | Stratix (EP1S60) | Stratix |
| Logic Elements | 57,120 | 57,120 |
| Total Memory Bits | 5,215,104 | — |
| Maximum User I/O | 773 | — |
| パッケージ | 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch | 1020-ball FC-FBGA, 33 × 33 mm, 1 mm pitch |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| Logic Family | CMOS | — |
| 動作温度 | 0C to +85C (Commercial) | 0 °C to +85 °C (Commercial) |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Speed Grade | 7 | C6 |
| Logic Cells / Logic Blocks | 6,570 (per datasheet Section I nomenclature) | — |
| DSP Blocks | Embedded dedicated multiplier / adder blocks | 12 |
| PLLs | Up to 12 enhanced PLLs per die | — |
| Configuration Method | Serial or parallel with optional decompression | — |
| MSLレベル | 3 (per BGA moisture-sensitivity norms) | — |
| RoHS ステータス | Compliant (lead-free) | [DATA_NEEDED: rohs_status] |
| Logic Array Blocks (LABs) | — | 6,570 |
| Embedded Memory Bits | — | 5,215,104 |
| Maximum User I/O Pins | — | 773 |
| Process Technology | — | 130 nm CMOS |
| Maximum Internal Frequency | — | 450.05 MHz |