EP1SGX25FF1020I7N vs EP1SGX25FF1020I7 比較
詳細な並列比較: EP1SGX25FF1020I7N メーカー: Intel および EP1SGX25FF1020I7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP1SGX25FF1020I7 - Stratix GX FPGA 25,660 Cells, 1.5V, FC-FBGA-1020 | Altera / Intel
EP1SGX25FF1020I7 Obsolete仕様比較
| パラメータ | EP1SGX25FF1020I7N | EP1SGX25FF1020I7 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $98.50 | $210.00 |
| Product Family | Stratix GX | — |
| Logic Family | CMOS | — |
| Number of Logic Cells | 25,660 | — |
| Number of CLBs | 2,566 | — |
| Process Technology | 130 nm | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Number of Terminals | 1020 | — |
| Terminal Form | Ball | Ball |
| Package Code | BGA | — |
| Package Shape | Square | — |
| Package Body | 33 x 33 mm, 1.0 mm pitch, FBGA-1020, lead-free | — |
| 動作温度範囲 | 0 to 85 °C (DigChip excerpt for this MPN) | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount (FC-FBGA) |
| Embedded Memory Bits | [DATA_NEEDED: embedded memory bits] | — |
| 最大クロック周波数 | [DATA_NEEDED: maximum clock frequency] | — |
| Number of Multi-Gigabit Transceivers | [DATA_NEEDED: transceiver count] | — |
| User I/O Count | [DATA_NEEDED: user I/O count] | — |
| RoHS / Lead-Free | Lead-free finish indicated by N suffix; complete RoHS status [DATA_NEEDED: full RoHS certificate status] | — |
| MSLレベル | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| ライフサイクル状態 | Obsolete / NRND (Stratix GX family end-of-life) | — |
| Family | — | Stratix GX |
| Series | — | EP1SGX25 |
| Logic Cells | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| パッケージ | — | FC-FBGA-1020 (Flip-Chip Fine-pitch BGA) |
| Number of Terminals / Balls | — | 1020 |
| Temperature Grade (suffix 'I') | — | Industrial |
| Speed Grade | — | 7 (highest production grade) |
| Terminal Pitch | — | [DATA_NEEDED: terminal pitch] |
| Combinatorial Delay per CLB | — | 9.48 ns (per Microchip USA listing) |
| Combinatorial Delay Variant | — | [DATA_NEEDED: tPD per CLB variant speed grade] |
| Maximum Internal Clock Frequency | — | [DATA_NEEDED: max Fmax in MHz per speed grade] |
| Embedded Transceivers | — | Yes (Stratix GX feature) |
| Configuration Method | — | SRAM-based (volatile, requires configuration at power-up) |
| RoHS ステータス | — | [DATA_NEEDED: RoHS compliance] |