EP20K30EFC324-3 vs EP20K100EFC324-1N 比較
詳細な並列比較: EP20K30EFC324-3 メーカー: Altera および EP20K100EFC324-1N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K30EFC324-3 | EP20K100EFC324-1N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $175.00 | $108.00 |
| Series | APEX-20KE | — |
| Family | APEX 20KE (MultiCore architecture) | APEX-20KE |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Typical Gate Count | 30,000 gates | — |
| Macrocells | 128 | — |
| Total RAM Bits | 24,576 | — |
| Logic Elements (approx.) | 1,200 | — |
| User I/O | 120 | — |
| Speed Grade | -3 | — |
| パッケージ | 324-FBGA (19 mm x 19 mm) | 324-BGA (FineLine BGA) |
| 実装タイプ | Surface Mount | — |
| Operating Temperature (max) | 85 C | — |
| MSLレベル | 3 | — |
| Peak Reflow Temperature | 220 C | — |
| LVDS I/O Support | Yes | — |
| Programming Interface | JTAG (in-system programmable) | — |
| RoHS ステータス | unknown | — |
| Process Technology | 1.8 V, 0.18 micrometer CMOS | 0.15 µm all-layer copper CMOS |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements (LEs) | — | 4160 |
| Typical Gates | — | 100,000 |
| Maximum User I/O | — | 246 |
| Embedded System Blocks (ESBs) | — | 53248 bits |
| 動作温度 | — | 0 C to 85 C |
| Propagation Delay | — | 1.6 ns |
| Internal Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| I/O Standard Support | — | LVDS, SSTL, HSTL, LVTTL, LVCMOS |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming Technology | — | SRAM-based (volatile, requires configuration device) |
| MultiVolt I/O | — | 1.8 V core with 3.3 V / 5.0 V I/O support |