EP20K30EFC324-3 vs EP20K100EFC324-1N 对比
详细并排对比 EP20K30EFC324-3 出自 Altera 和 EP20K100EFC324-1N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EP20K30EFC324-3 | EP20K100EFC324-1N |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $175.00 | $108.00 |
| Series | APEX-20KE | — |
| Family | APEX 20KE (MultiCore architecture) | APEX-20KE |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Typical Gate Count | 30,000 gates | — |
| Macrocells | 128 | — |
| Total RAM Bits | 24,576 | — |
| Logic Elements (approx.) | 1,200 | — |
| User I/O | 120 | — |
| Speed Grade | -3 | — |
| 封装 | 324-FBGA (19 mm x 19 mm) | 324-BGA (FineLine BGA) |
| 安装类型 | Surface Mount | — |
| Operating Temperature (max) | 85 C | — |
| MSL 等级 | 3 | — |
| Peak Reflow Temperature | 220 C | — |
| LVDS I/O Support | Yes | — |
| Programming Interface | JTAG (in-system programmable) | — |
| RoHS 状态 | unknown | — |
| Process Technology | 1.8 V, 0.18 micrometer CMOS | 0.15 µm all-layer copper CMOS |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Elements (LEs) | — | 4160 |
| Typical Gates | — | 100,000 |
| Maximum User I/O | — | 246 |
| Embedded System Blocks (ESBs) | — | 53248 bits |
| 工作温度 | — | 0 C to 85 C |
| Propagation Delay | — | 1.6 ns |
| Internal Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| I/O Standard Support | — | LVDS, SSTL, HSTL, LVTTL, LVCMOS |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming Technology | — | SRAM-based (volatile, requires configuration device) |
| MultiVolt I/O | — | 1.8 V core with 3.3 V / 5.0 V I/O support |