EP20K30EFC324-3 vs EP20K30EFC324-1 比較
詳細な並列比較: EP20K30EFC324-3 メーカー: Altera および EP20K30EFC324-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K30EFC324-3 | EP20K30EFC324-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $175.00 | $99.50 |
| Series | APEX-20KE | APEX-20K |
| Family | APEX 20KE (MultiCore architecture) | APEX-20KE (1.8V, LVDS) |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Typical Gate Count | 30,000 gates | — |
| Macrocells | 128 | — |
| Total RAM Bits | 24,576 | 24576 |
| Logic Elements (approx.) | 1,200 | — |
| User I/O | 120 | — |
| Speed Grade | -3 | -1 |
| パッケージ | 324-FBGA (19 mm x 19 mm) | 324-FBGA (FineLine BGA, 19x19 mm) |
| 実装タイプ | Surface Mount | Surface Mount |
| Operating Temperature (max) | 85 C | — |
| MSLレベル | 3 | [DATA_NEEDED: MSL moisture sensitivity level] |
| Peak Reflow Temperature | 220 C | — |
| LVDS I/O Support | Yes | — |
| Programming Interface | JTAG (in-system programmable) | — |
| RoHS ステータス | unknown | — |
| Process Technology | 1.8 V, 0.18 micrometer CMOS | SRAM-based, 0.18 um |
| Manufacturer | — | Altera (now Intel) |
| Logic Elements (typical) | — | 30,000 (30KLE) |
| Typical Gates | — | [DATA_NEEDED: typical gate count] |
| Maximum User I/O | — | 128 |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Supply Voltage | — | [DATA_NEEDED: VCCIO range] |
| ピン数 | — | 324 |
| Temperature Grade | — | Commercial (per Altera family specification) |
| 動作温度 | — | 0C to +85C (commercial grade per Altera family spec) |
| Configuration | — | Passive serial / passive parallel / JTAG |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS compliance] |
| PLLs | — | Up to 4 (per APEX-20KE family) |