EP20K30EFC324-3 vs EP20K30EFC324-1 对比

详细并排对比 EP20K30EFC324-3 出自 Altera 和 EP20K30EFC324-1 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP20K30EFC324-3 EP20K30EFC324-1
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $175.00 $99.50
Series APEX-20KE APEX-20K
Family APEX 20KE (MultiCore architecture) APEX-20KE (1.8V, LVDS)
Core Supply Voltage 1.71 V to 1.89 V (1.8 V nominal) —
Typical Gate Count 30,000 gates —
Macrocells 128 —
Total RAM Bits 24,576 24576
Logic Elements (approx.) 1,200 —
User I/O 120 —
Speed Grade -3 -1
封装 324-FBGA (19 mm x 19 mm) 324-FBGA (FineLine BGA, 19x19 mm)
安装类型 Surface Mount Surface Mount
Operating Temperature (max) 85 C —
MSL 等级 3 [DATA_NEEDED: MSL moisture sensitivity level]
Peak Reflow Temperature 220 C —
LVDS I/O Support Yes —
Programming Interface JTAG (in-system programmable) —
RoHS 状态 unknown —
Process Technology 1.8 V, 0.18 micrometer CMOS SRAM-based, 0.18 um
Manufacturer — Altera (now Intel)
Logic Elements (typical) — 30,000 (30KLE)
Typical Gates — [DATA_NEEDED: typical gate count]
Maximum User I/O — 128
Core Supply Voltage (VCCINT) — 1.71 V to 1.89 V
I/O Supply Voltage — [DATA_NEEDED: VCCIO range]
引脚数量 — 324
Temperature Grade — Commercial (per Altera family specification)
工作温度 — 0C to +85C (commercial grade per Altera family spec)
Configuration — Passive serial / passive parallel / JTAG
Lead-Free / RoHS — [DATA_NEEDED: RoHS compliance]
PLLs — Up to 4 (per APEX-20KE family)

数据手册与资源

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