EP20K400FI672-3 vs EP20K400FI672-3N 比較
詳細な並列比較: EP20K400FI672-3 メーカー: Altera および EP20K400FI672-3N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K400FI672-3 | EP20K400FI672-3N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Unknown |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $195.00 | $0.00 |
| Family | APEX 20K | — |
| Series | EP20K400 | EP20K400 |
| Logic Elements | 16640 | — |
| Total Gates | up to 400000 | — |
| Embedded RAM | 212992 bits | — |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 6 | — |
| Propagation Delay | 3.6 ns | 3.6 ns |
| 最大クロック周波数 | 833 MHz | 833 MHz |
| Supply Voltage (Nominal) | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | 2.375 V to 2.625 V |
| Process Technology | CMOS | CMOS |
| Package Type | PBGA (Plastic BGA) | — |
| Package Code | S-PBGA-B672 | — |
| Terminal Count | 672 | 672 terminals |
| Terminal Pitch | 1.000 mm | 1.000 mm |
| Package Shape | Square BGA | — |
| 実装タイプ | Surface Mount | Surface mount |
| Configuration Interface | JTAG (IEEE 1149.1) | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| MSLレベル | 3 | — |
| Peak Reflow Temperature | 220 C | — |
| Device Type | — | CMOS loadable programmable logic device |
| Product Family | — | APEX 20K |
| User I/O Count | — | 502 |
| Nominal Supply Voltage | — | 2.5 V |
| パッケージ | — | S-PBGA-B672 |
| Logic Capacity | — | [DATA_NEEDED: logic capacity] |
| Configuration Method | — | [DATA_NEEDED: configuration method] |
| I/O Standard Support | — | [DATA_NEEDED: supported I/O standards] |
| RoHS ステータス | — | unknown |
| REACH Status | — | unknown |
| AEC-Q100 Qualification | — | unknown |