EP20K400FI672-3N vs EP20K400FI672-2N 比較
詳細な並列比較: EP20K400FI672-3N メーカー: Altera および EP20K400FI672-2N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K400FI672-3N | EP20K400FI672-2N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Unknown | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.00 | $188.75 |
| Device Type | CMOS loadable programmable logic device | — |
| Product Family | APEX 20K | — |
| Series | EP20K400 | — |
| Propagation Delay | 3.6 ns | 3.1 ns |
| 最大クロック周波数 | 833 MHz | — |
| User I/O Count | 502 | — |
| Nominal Supply Voltage | 2.5 V | — |
| Supply Voltage Range | 2.375 V to 2.625 V | — |
| Process Technology | CMOS | 0.22 µm CMOS |
| パッケージ | S-PBGA-B672 | 672-pin FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Terminal Count | 672 terminals | — |
| Terminal Pitch | 1.000 mm | 1.0 mm |
| 実装タイプ | Surface mount | Surface Mount |
| Logic Capacity | [DATA_NEEDED: logic capacity] | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | Commercial (0 °C to +70 °C) [DATA_NEEDED: industrial variant] |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| I/O Standard Support | [DATA_NEEDED: supported I/O standards] | — |
| RoHS ステータス | unknown | Compliant (lead-free) |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20K |
| Typical Gates | — | 400,000 |
| Logic Elements / Cells | — | 16,640 |
| Maximum User I/O | — | 488 |
| Embedded Memory Bits | — | 212,992 bits |
| Embedded Array Blocks (EABs) | — | [DATA_NEEDED: EAB count per family datasheet] |
| Core Voltage | — | 2.5 V |
| Maximum Frequency | — | 200 MHz |
| Package Body Size | — | 27 x 27 mm |
| Speed Grade | — | -2 |
| 湿気感度レベル（MSL） | — | 3 |
| Peak Reflow Temperature | — | 220 °C |
| Configuration Modes | — | PS, PPS, PPA, JTAG |
| Supported I/O Standards | — | LVTTL, LVCMOS, SSTL, HSTL |