EP20K400GI655-1 vs EP20K400GC655-2 比較
詳細な並列比較: EP20K400GI655-1 メーカー: Altera および EP20K400GC655-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP20K400GI655-1 | EP20K400GC655-2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $195.00 | $80.00 |
| Family | APEX 20K | APEX 20K |
| Device Series | EP20K400 | — |
| Technology | CMOS, SRAM-based | — |
| Logic Elements | 16640 | — |
| Typical Gates | 400000 | — |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 4 | — |
| Total Terminals | 655 | — |
| Propagation Delay | 2.5 ns | — |
| Package Type | Ceramic Pin Grid Array (CPGA-655) | 655-BCPGA (CPGA-655) |
| JESD-30 Package Code | S-CPGA-P655 | — |
| 動作温度 | -40C to +85C (Industrial) | [DATA_NEEDED: operating temperature range] |
| Moisture Sensitivity Level | MSL 1 | — |
| Peak Reflow Temperature | 220 C | — |
| Programmability | In-system, JTAG boundary-scan (IEEE 1149.1) | — |
| Process Node | 0.18 micrometer CMOS | — |
| RoHS ステータス | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Series | — | APEX-20KC |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| System Gates | — | 400,000 |
| Logic Cells / Elements | — | 16,640 |
| Total RAM Bits | — | 212,992 |
| Maximum Internal Frequency | — | 200 MHz |
| Speed Grade | — | -2 |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 1.71 V to 1.89 V (MultiVolt) |
| LVDS Support | — | Yes |
| PLLs | — | 4 |
| ピン数 | — | 655 |
| Package Dimensions | — | 62.48 x 62.48 mm |
| 実装タイプ | — | Through-Hole (CPGA) |