EP20K400GI655-1X vs EP20K400GC655-2X 比較
詳細な並列比較: EP20K400GI655-1X メーカー: Altera および EP20K400GC655-2X メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EP20K400GI655-1X - 400K Gate APEX 20K FPGA, 16640 Logic Elements, 655-Pin CPGA | Altera (Intel)
EP20K400GI655-1X Obsolete仕様比較
| パラメータ | EP20K400GI655-1X | EP20K400GC655-2X |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $160.00 | $175.00 |
| Family | APEX 20K | APEX 20K |
| Device | EP20K400 | — |
| Logic Elements | 16640 | — |
| Number of Terminals | 655 | — |
| User I/O Lines | 502 | — |
| Dedicated Inputs | 4 | — |
| Package Type | Ceramic Pin Grid Array (CPGA) | 655-BCPGA (SPGA655) |
| Package Code (JESD-30) | S-CPGA-P655 | — |
| Package Equivalence Code | SPGA655,47X47 | — |
| Package Body Material | CERAMIC (metal-sealed co-fired) | CERAMIC, metal-sealed cofired grid array |
| Speed Grade | -1 | — |
| Propagation Delay | 2.5 ns (typical for -1 grade) | — |
| Process Technology | CMOS, SRAM-based configuration | 0.22 µm CMOS |
| 湿気感度レベル（MSL） | 1 | — |
| Peak Reflow Temperature | 220 C | 220 °C |
| 動作温度 | -40 C to +85 C (industrial) | [DATA_NEEDED: temperature grade] |
| 実装タイプ | Through-Hole (PGA) | Through-hole (CPGA) |
| RoHS ステータス | Compliant | unknown |
| Series | — | APEX-20KC® |
| Logic Elements / Cells | — | 16640 |
| System Gates | — | 400000 |
| Total RAM Bits | — | 212992 |
| Number of I/O | — | 496 |
| Number of Dedicated Inputs | — | 6 |
| Number of LABs/CLBs | — | [DATA_NEEDED: number of Logic Array Blocks] |
| Number of EABs | — | [DATA_NEEDED: number of Embedded Array Blocks] |
| Maximum Operating Frequency | — | 200 MHz |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5 V |
| Package Dimensions | — | 47 x 47 mm |
| Programmability | — | In-system, JTAG (IEEE 1149.1) |