EP2A25F672C8 vs EP2A25F672I-7 比較
詳細な並列比較: EP2A25F672C8 メーカー: Altera および EP2A25F672I-7 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A25F672C8 | EP2A25F672I-7 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $951.18 | $171.00 |
| Family | APEX II (EP2A25) | APEX II |
| Logic Elements | 25,000 (typical gates) | — |
| Maximum System Gates | 40,960 | — |
| Macrocells / Embedded Logic | 2,432 macros | — |
| User I/O Count | 492 | — |
| パッケージ | 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch) | 672-pin FC-FBGA |
| Propagation Delay (tpd) | 1.69 ns | — |
| Speed Grade | C8 | -7 |
| 動作温度 | 0 C to 85 C (commercial) | -40C to +85C (Industrial) |
| Process Technology | 0.15 microm CMOS, 8-layer copper interconnect | 0.15 um |
| I/O Standards Supported | LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL | — |
| LVDS Data Rate | 1 Gbps | — |
| PLL Count | 4 | — |
| Embedded Memory | ESB blocks (dual-port RAM, FIFO, CAM, ROM) | ESBs (Embedded System Blocks) |
| I/O Banks | 16 | — |
| 実装タイプ | Surface Mount | Surface Mount (Flip-Chip BGA) |
| RoHS ステータス | Non-compliant (legacy product) | [DATA_NEEDED: rohs status] |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| System Gates | — | 900K (approximately) |
| Logic Cells / Elements | — | 24,320 |
| Maximum Operating Frequency | — | 500 MHz |
| Core Voltage | — | 1.5 V |
| Temperature Grade | — | Industrial (I) |
| Configuration Method | — | JTAG, Passive Serial, Active Serial |
| JTAG Support | — | IEEE 1149.1 Boundary Scan |
| MSLレベル | — | [DATA_NEEDED: MSL level] |