EP2A25F672C9 vs EP2A25F672I9 比較
詳細な並列比較: EP2A25F672C9 メーカー: Altera および EP2A25F672I9 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2A25F672C9 | EP2A25F672I9 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $700.00 | $135.00 |
| Family | APEX II | APEX II |
| Logic Elements (LE) | Approximately 25,000 | — |
| Macro Cells | 2432 | — |
| User I/O | 492 | — |
| パッケージ | 672-ball FCBGA (FineLine BGA) | 672-pin FC-FBGA |
| Package Dimensions | 27 mm x 27 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.15 µm CMOS |
| Logic Family | CMOS | — |
| Propagation Delay | 1.69 ns | — |
| 動作温度 | 0°C to 85°C (Commercial) | — |
| 電源電圧 | [DATA_NEEDED: core VCC voltage] | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) | — |
| Configuration | Passive Serial, Passive Parallel Synchronous, JTAG | — |
| Embedded Memory | ESBs for dual-port RAM, ROM, FIFO | — |
| 実装タイプ | Surface Mount | Surface Mount (flip-chip BGA) |
| RoHS ステータス | [DATA_NEEDED] | Unknown (legacy 2000s part; verify lot certificate) |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements (LEs) | — | 24,320 |
| System Gates (typical) | — | 900,000 |
| Maximum Operating Frequency | — | 236 MHz |
| Core Voltage (VCCINT) | — | 1.5 V |
| ピン数 | — | 672 |
| Temperature Grade | — | Industrial (-40 °C to +100 °C) |
| Speed Grade | — | 9 (fastest APEX II grade) |
| Embedded System Blocks (ESBs) | — | Yes (dual-port RAM/ROM) |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O pin count] |
| Maximum Memory Bits | — | 422,400 bits |
| PLLs | — | 4 |
| Peak Reflow Temperature | — | 220 °C (per distributor listing) |
| 湿気感度レベル（MSL） | — | 3 |