EP2S15F672C5 vs EP2S15F672C3 比較
詳細な並列比較: EP2S15F672C5 メーカー: Intel および EP2S15F672C3 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2S15F672C5 | EP2S15F672C3 |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $199.00 | $142.30 |
| Family | Stratix II | Stratix II |
| Series | EP2S15 | — |
| Logic Elements | 15,600 | 15,600 |
| CLBs | 6,240 | — |
| Memory Bits | 419,328 | — |
| Maximum User I/O | 366 | 366 |
| Operating Frequency (max) | 640 MHz | — |
| Speed Grade | -5 (mid-tier) | C3 (third commercial speed bin) |
| Package Type | 672-ball FineLine BGA (FBGA) | — |
| Package Dimensions | 27 mm x 27 mm | — |
| Ball Pitch | 1 mm | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Voltage - Supply (VCCINT) | [DATA_NEEDED: VCCINT nominal] | — |
| 動作温度 | Commercial (0C to +85C) | — |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| RoHS ステータス | Compliant (legacy lead-free version exists) | [DATA_NEEDED: RoHS compliance] |
| 実装タイプ | Surface Mount | Surface Mount |
| Embedded Memory (bits) | — | 419,328 |
| DSP Blocks (18-bit multipliers) | — | 156 |
| Core Voltage | — | 1.2 V |
| Maximum Internal Frequency | — | [DATA_NEEDED: max internal clock MHz] |
| パッケージ | — | 672-ball FC-FBGA |
| Operating Temperature Grade | — | Commercial (C3 suffix) |
| PLLs | — | [DATA_NEEDED: number of PLLs] |
| Global Clock Networks | — | [DATA_NEEDED: number of global clocks] |
| MSLレベル | — | [DATA_NEEDED: moisture sensitivity level] |