EP2S60F1020I4 vs EP2S60F1020C3 比較
詳細な並列比較: EP2S60F1020I4 メーカー: Altera および EP2S60F1020C3 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2S60F1020I4 | EP2S60F1020C3 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $1,454.92 | $1,380.00 |
| Manufacturer | Intel / Altera | — |
| Series | Stratix II | Stratix II |
| Logic Elements (LEs) | 60,440 | 60,440 |
| Embedded Memory (bits) | 2,544,192 | — |
| Number of LABs/CLBs | 3022 | — |
| Number of CLBs | 24176 | — |
| Maximum User I/O | 718 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | [DATA_NEEDED: I/O banks] |
| Operating Voltage (Core) | 1.2 V | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Temperature Grade | Industrial (-40C to +100C TJ) | — |
| Package Type | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) | — |
| Package Dimensions | 33 mm x 33 mm | — |
| Ball Pitch | 1.0 mm | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| Number of PLLs | 12 | — |
| Global Clock Networks | 16 | 18 |
| Embedded Multipliers (18x18) | 36 | — |
| Transceiver Count | 0 (no embedded transceivers) | — |
| Maximum Embedded Memory Bandwidth | [DATA_NEEDED: memory bandwidth spec] | — |
| RoHS ステータス | Non-compliant (contains lead per legacy Altera package) | Compliant |
| Family | — | Stratix II FPGA |
| Logic Array Blocks (LABs) | — | 3022 |
| Total RAM Bits | — | 2,544,192 bits (2.5 Mbit) |
| User I/O Count | — | 718 |
| DSP Blocks (18x18 multipliers) | — | 144 18x18 multipliers (36 DSP blocks) |
| PLLs | — | 12 |
| Maximum Internal Frequency | — | 816.99 MHz |
| Core Voltage | — | 1.2 V |
| 動作温度 | — | 0C to +85C (commercial, C3 speed grade) |
| パッケージ | — | 1020-ball FC-FBGA |
| Package Body Size | — | 33 mm x 33 mm, 1.0 mm ball pitch |
| Supplier Device Package | — | 1020-BGA |
| Speed Grade | — | C3 |