EP2SGX90FF1152C3 vs EP2SGX90EF1152C4 比較
詳細な並列比較: EP2SGX90FF1152C3 メーカー: Altera および EP2SGX90EF1152C4 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP2SGX90FF1152C3 | EP2SGX90EF1152C4 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $320.00 | $890.00 |
| Series | Stratix II GX | — |
| Logic Elements | 90960 | — |
| Embedded Memory | 4520448 bits (4.5 Mbit TriMatrix) | — |
| LABs/CLBs | 4548 | — |
| Number of I/O | 558 | — |
| 電源電圧 | [DATA_NEEDED: core and I/O supply voltages] | — |
| 動作温度 | 0C to +85C (commercial, C3) | [DATA_NEEDED: operating temperature] |
| パッケージ | 1152-BBGA, FCBGA (FF1152) | — |
| 実装タイプ | Surface Mount | — |
| Speed Grade | C3 | — |
| Process Node | 90 nm | — |
| Multiplier Blocks (18x18) | 252 | — |
| Enhanced PLLs | 4 | — |
| Fast PLLs | 8 | — |
| Global Clock Networks | 16 | — |
| Configuration Method | Enhanced Configuration (EPC) compatible | [DATA_NEEDED: configuration method] |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | RoHS Compliant |
| Lead Free | [DATA_NEEDED: lead-free status] | — |
| Product Type | — | Field Programmable Gate Array (FPGA) |
| Family | — | Stratix II GX |
| Logic Cells | — | 90960 cells |
| Logic Array Blocks | — | 4548 LABs |
| User I/O | — | 558 I/O |
| Process Technology | — | 90 nm |
| Core Voltage | — | 1.2 V |
| Reported Maximum Frequency | — | 732.1 MHz |
| Alternate Reported Maximum Frequency | — | 717 MHz |
| Package Type | — | FC-FBGA |
| Package Pin Count | — | 1152 pins |
| Alternate Package Description | — | FBGA-1152 |
| Package Mounting | — | Surface Mount |
| Lead-Free Status | — | Lead free |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |