EP3SL50F484C2N vs EP3SE50F484C2G 比較
詳細な並列比較: EP3SL50F484C2N メーカー: Altera および EP3SE50F484C2G メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP3SL50F484C2N | EP3SE50F484C2G |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $175.00 | $1,180.00 |
| Series | Stratix III L | Stratix III E |
| Family | Stratix III | — |
| Logic Elements | 47,500 | — |
| Logic Array Blocks (LABs) | 1,900 | — |
| Embedded Memory | 2,184,192 bits | — |
| User I/Os | 296 | — |
| Operating Frequency | 600 MHz | — |
| Process Technology | 65 nm | 40 nm TSMC low-power CMOS |
| Core Supply Voltage | 1.1 V | — |
| パッケージ | 484-ball FC-FBGA (Flip-Chip) | — |
| Package Code | BGA | — |
| Package Shape | Square | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Temperature Grade | Industrial (C2) | — |
| Lead-Free / RoHS | Yes (compliant) | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Configuration Method | JTAG / Passive Serial / FPP | — |
| Number of Logic Elements / Cells | — | 47,500 |
| Number of LABs / CLBs | — | 1,900 |
| Total RAM Bits | — | 5,760,000 (5,760 Kbit) |
| Number of User I/O | — | 296 |
| パッケージ / ケース | — | 484-BBGA, FCBGA (FineLine BGA) |
| Core Voltage Supply | — | 0.86 V to 1.15 V |
| 動作温度 | — | 0 °C to +85 °C (TJ) |
| Logic Element Architecture | — | Adaptive Logic Module (ALM) with 8-input fracturable LUT |
| Embedded DSP Blocks | — | Yes (variable-precision multipliers) |
| Transceivers | — | Multi-gigabit transceivers (selected package pins) |
| Memory Interface Support | — | DDR / DDR2 / DDR3 with hard PHY |
| Partial Reconfiguration | — | Supported |
| Configuration Interface | — | JTAG, Passive Serial, Fast Passive Parallel |
| Part Status | — | Active (Intel catalogue); long-term supply subject to Stratix III lifecycle policy |
| RoHS ステータス | — | Compliant |