EP3SL50F484I4L vs EP3SL50F484I3N 比較
詳細な並列比較: EP3SL50F484I4L メーカー: Intel および EP3SL50F484I3N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP3SL50F484I4L | EP3SL50F484I3N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $658.26 | $552.30 |
| Series | Stratix III L (Low Power) | — |
| Family | Stratix III | Stratix III L |
| Logic Elements (LE) | 47,500 | — |
| Embedded Memory Bits | 2,184,192 bits (~273 KB) | — |
| User I/O Pins | 296 | — |
| パッケージ | 484-ball FBGA (FCBGA) | 484-ball FBGA (FC-FBGA, 23x23 mm, 1.0 mm pitch) |
| Speed Grade | 4 | — |
| 動作温度 | 0 °C to 85 °C (commercial, per DigiKey listing) | — |
| 電源電圧 | 0.9 V core (family-typical) | — |
| Process Technology | 65 nm low-power CMOS | 65 nm CMOS |
| 実装タイプ | Surface Mount | Surface Mount (SMT) |
| Lead-Free / RoHS | Yes (RoHS compliant) | Lead Free / Compliant |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| Transceivers | Family supports up to 4 transceivers per family datasheet | — |
| DSP Blocks | Family supports up to 384 18x18 multipliers (family-level) | — |
| Logic Elements | — | 47,500 |
| Logic Array Blocks (LABs) | — | 1,900 |
| Embedded Memory | — | 2,184,192 bits (2.1 Mbit) |
| Embedded 18x18 Multipliers | — | 218 |
| Maximum User I/O | — | 296 |
| Core Voltage | — | 0.9 V / 1.1 V |
| Maximum Core Frequency | — | 500 MHz |
| 動作接合温度 | — | -40C to +100C (Industrial) |
| MSLレベル | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Programming Tool | — | Quartus II (legacy) |