EP610DC-25 vs EP610DC-15 比較
詳細な並列比較: EP610DC-25 メーカー: Rochester Electronics および EP610DC-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ 生産中仕様比較
| パラメータ | EP610DC-25 | EP610DC-15 |
|---|---|---|
| ブランド | Rochester Electronics | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $7.95 |
| Family | Altera Classic EPLD | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 16 | 16 |
| Equivalent Gates | 300 | — |
| Maximum Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate | Up to 100 MHz | — |
| Number of I/O Pins | 22 | — |
| Number of Dedicated Inputs | 4 | — |
| Total Pin Count | 24 | — |
| パッケージ | 24-pin CDIP (Ceramic DIP, through-hole) | 24-pin Ceramic DIP (CDIP-24) with UV window |
| 実装タイプ | Through Hole | Through-Hole |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | 4.75 V to 5.25 V |
| 動作温度 | 0 C to +70 C | 0C to 70C (commercial) |
| Technology | CMOS EPROM (UV-erasable) | CMOS |
| Programming Method | JEDEC fuse-map / UV-erase | JEDEC fuse map, UV erasure |
| Speed Grade Suffix | -25 (25 ns tPD) | — |
| Product Family | — | Classic EPLD (EP610) |
| Architecture | — | UV-erasable CMOS PAL-type |
| Logic Expanders | — | 4 |
| Dedicated Inputs | — | 20 |
| Bidirectional I/O Pins | — | 16 |
| Total Product Terms | — | 160 |
| Propagation Delay (tPD) | — | 15 ns (speed grade -15) |
| Maximum Internal Clock Frequency | — | 71.4 MHz |
| RoHS ステータス | — | [DATA_NEEDED: RoHS status] |