EP610ILC-10 vs EP610LC-25 比較
詳細な並列比較: EP610ILC-10 メーカー: Altera および EP610LC-25 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610ILC-10 | EP610LC-25 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $7.20 | $6.20 |
| Device Family | Classic EPLD | — |
| Product Type | UV-Erasable / OTP PLD | EPLD (Erasable Programmable Logic Device) |
| Architecture | PAL-type with macrocells | — |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | — |
| Product Terms | 160 | — |
| I/O Pins | 16 | [DATA_NEEDED: exact I/O count] |
| Dedicated Inputs | 4 | — |
| 電源電圧 | 5 V (single supply) | 5 V ±5% |
| Pin-to-Pin Delay (tPD) | 10 ns (grade -10) | — |
| Counter Frequency (fCNT) | 100 MHz | — |
| Logic Family Compatibility | TTL (5 V CMOS/TTL-compatible I/O) | — |
| パッケージ | PLCC-28 (plastic J-lead chip carrier) | PLCC-28 |
| 実装タイプ | Surface Mount (PLCC socket or solder) | Surface Mount |
| 動作温度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED] |
| Family | — | Classic EPLD |
| Logic Array Blocks (LABs) | — | 4 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Toggle Frequency | — | 100 MHz |
| Pipelined Data Rate | — | Up to 100 MHz |
| Technology | — | CMOS |
| Programmability | — | UV-erasable (windowed package) |