EP610PC-30 vs EP610PC-25 比較
詳細な並列比較: EP610PC-30 メーカー: Altera および EP610PC-25 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP610PC-30 | EP610PC-25 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.74 | $9.75 |
| Device Family | Classic EPLD (EP610) | Classic EPLD (EP610 series) |
| Macrocells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 30 ns | — |
| Maximum Pipeline Frequency | 33.3 MHz (typical) / 100 MHz pipelined | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Process Technology | CMOS EPROM | — |
| パッケージ | 24-pin PDIP (0.300 inch) | PDIP-24 (0.3 inch, through-hole) |
| 実装タイプ | Through-Hole | Through-Hole (DIP) |
| Programmability | One-Time Programmable (OTP, no window on plastic PDIP) | — |
| 動作温度 | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Output Drive Current | [DATA_NEEDED: IOH/IOL per datasheet DC characteristics] | — |
| Input Pins (Dedicated) | [DATA_NEEDED: dedicated input count from datasheet pinout] | — |
| I/O Pins | [DATA_NEEDED: bidirectional I/O count from datasheet pinout] | 20 (bidirectional, JTAG-programmable OE per macrocell) |
| Programming Tool | Altera A+PLUS / MAX+PLUS II (legacy) | — |
| RoHS ステータス | Not applicable (legacy non-compliant package per distributor listing) | [DATA_NEEDED: RoHS status] |
| Lead Free Status | Not applicable | — |
| Current Distributor | Rochester Electronics, LLC (authorized continuing source) | — |
| Macro Cells | — | 16 |
| Propagation Delay (tpd) | — | 25 ns |
| Maximum Pipelined Data Rate | — | 100 MHz |
| Supply Voltage (Vcc) | — | 5 V (nominal) |
| Technology | — | CMOS, EPROM (UV-erasable) |
| Device Type | — | OT PLD, PAL-type, CMOS |
| Dedicated Inputs | — | 4 |
| Programming Method | — | EPROM (UV-erasable), via Altera programming hardware |