EP910LC-35T vs EP910LC44-35 比較
詳細な並列比較: EP910LC-35T メーカー: Altera および EP910LC44-35 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910LC-35T | EP910LC44-35 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $28.90 | $19.95 |
| Family | Classic EPLD (EP910) | Classic EPLD (OT sub-family) |
| Logic Capacity | 450 usable gates | — |
| Macrocells | 24 | 24 |
| Propagation Delay (tPD) | 35 ns | 35 ns (max) |
| Maximum Operating Frequency | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V (single supply) |
| User I/O Pins | 36 | — |
| パッケージ | PLCC-44 (J-lead) | 44-pin PLCC (J-leaded) |
| Process Technology | CMOS (EPROM-based) | CMOS |
| 動作温度 | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Erasure Method | UV-erasable window (ceramic package) / OTP (plastic) | — |
| Programming | Altera programming hardware + MAX+PLUS II | — |
| 実装タイプ | Surface Mount (PLCC socket or solder) | Surface Mount |
| MSLレベル | MSL 3 (168 hours) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status not in verified data] | — |
| Architecture | — | PAL-type AND/OR array |
| Usable Gates | — | 450 |
| Maximum Frequency (fMAX) | — | 28.6 MHz |
| Total Inputs | — | 36 |
| I/O Pins | — | 24 |
| Global Clocks | — | 2 |
| Programmability | — | UV-erasable (windowed ceramic) |