EP910LC44 vs EP910LC-25 比較
詳細な並列比較: EP910LC44 メーカー: Altera および EP910LC-25 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910LC44 | EP910LC-25 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.95 | $2.20 |
| Product Family | Classic EPLD (EP910 Series) | — |
| Manufacturer | Altera Corporation (now Intel PSG) | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Total Product Terms | 240 | — |
| Dedicated Inputs | 12 | 16 |
| I/O Pins | 24 | [DATA_NEEDED: I/O count] |
| Total Input Pins | 36 (12 dedicated + 24 I/O as inputs) | — |
| Global Clock Inputs | 2 | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Propagation Delay (LC grade) | [DATA_NEEDED: propagation delay for LC suffix - exact tPD not in verified data] | — |
| Propagation Delay (LC-30 grade) | 33 ns (per EP910LC44-30 verified data) | — |
| Process Technology | CMOS | — |
| パッケージ | 44-pin PLCC (J-leaded) | 28-pin PLCC (LC suffix) |
| 動作温度 | [DATA_NEEDED: commercial 0C-70C or industrial -40C-85C - not in verified data] | 0C to +70C (commercial) |
| Programming Method | EPROM (erasable UV for ceramic; OTP for plastic PLCC) | — |
| Architecture | AND-OR sum-of-products with programmable macrocell feedback | — |
| Logic Compatibility | TTL-compatible CMOS I/O | — |
| RoHS ステータス | [DATA_NEEDED: not stated in verified data] | [DATA_NEEDED: RoHS status] |
| Family | — | Altera Classic EPLD |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Propagation Delay (tPD) | — | 25 ns |
| 実装タイプ | — | Surface Mount |
| Technology | — | CMOS (EPROM-based) |
| Operating Voltage | — | [DATA_NEEDED: VCC range] |
| Programmable | — | Yes (EPROM, UV-erasable on windowed variants) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |