EP910LC44 vs EP910LC-25 对比

详细并排对比 EP910LC44 出自 Altera 和 EP910LC-25 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EP910LC44 EP910LC-25
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 最后采购期 Obsolete
库存状态 有库存 有库存
单价(USD) $8.95 $2.20
Product Family Classic EPLD (EP910 Series) —
Manufacturer Altera Corporation (now Intel PSG) —
Device Type Erasable Programmable Logic Device (EPLD) —
Macrocells 24 24
Total Product Terms 240 —
Dedicated Inputs 12 16
I/O Pins 24 [DATA_NEEDED: I/O count]
Total Input Pins 36 (12 dedicated + 24 I/O as inputs) —
Global Clock Inputs 2 —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) —
Propagation Delay (LC grade) [DATA_NEEDED: propagation delay for LC suffix - exact tPD not in verified data] —
Propagation Delay (LC-30 grade) 33 ns (per EP910LC44-30 verified data) —
Process Technology CMOS —
封装 44-pin PLCC (J-leaded) 28-pin PLCC (LC suffix)
工作温度 [DATA_NEEDED: commercial 0C-70C or industrial -40C-85C - not in verified data] 0C to +70C (commercial)
Programming Method EPROM (erasable UV for ceramic; OTP for plastic PLCC) —
Architecture AND-OR sum-of-products with programmable macrocell feedback —
Logic Compatibility TTL-compatible CMOS I/O —
RoHS 状态 [DATA_NEEDED: not stated in verified data] [DATA_NEEDED: RoHS status]
Family — Altera Classic EPLD
Logic Gates — [DATA_NEEDED: logic gate count]
Propagation Delay (tPD) — 25 ns
安装类型 — Surface Mount
Technology — CMOS (EPROM-based)
Operating Voltage — [DATA_NEEDED: VCC range]
Programmable — Yes (EPROM, UV-erasable on windowed variants)
Lead-Free — [DATA_NEEDED: lead-free status]
Maximum Frequency — [DATA_NEEDED: fMAX]

数据手册与资源

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