EP910LI-35Y vs EP910LI-40 比較
詳細な並列比較: EP910LI-35Y メーカー: Intel および EP910LI-40 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910LI-35Y | EP910LI-40 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $22.75 | $12.90 |
| Family | Altera Classic EPLD | — |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Propagation Delay (tpd) | 35 ns | — |
| Maximum Frequency (fmax) | [DATA_NEEDED: maximum toggle frequency in MHz] | — |
| Supply Voltage (VCC) | 5 V | — |
| Process Option | L (low-power CMOS) | — |
| Temperature Grade | Industrial (-40 °C to +85 °C) | — |
| パッケージ | PLCC-44 (J-lead) | PLCC-44 (J-lead, windowed ceramic) |
| 実装タイプ | Surface Mount | Surface Mount (socket-compatible) |
| Lead Finish | Lead-free (Y suffix, RoHS-compliant) | — |
| I/O Pins | 24 | 24 bidirectional |
| Dedicated Inputs | 36 | 12 |
| Technology | CMOS EPROM/UV-erasable | Low-power CMOS (L-suffix) |
| RoHS ステータス | Compliant (Y suffix) | Non-compliant (windowed ceramic PLCC, legacy) |
| Manufacturer | — | Altera (now Intel PSG) |
| Product Family | — | Classic EPLD - EP910 series |
| Device Type | — | Erasable Programmable Logic Device (EPLD) |
| Maximum Logic Inputs | — | 36 |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 40 ns |
| 動作温度 | — | -40C to +85C (industrial, I-suffix) |
| Programmability | — | UV-erasable, JEDEC-standard algorithm |
| Lifecycle | — | Obsolete - replaced by MAX 7000 / MAX II CPLD family |