EP910LI-40 vs EP910LC-40 比較
詳細な並列比較: EP910LI-40 メーカー: Altera および EP910LC-40 メーカー: Rochester Electronics。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsolete仕様比較
| パラメータ | EP910LI-40 | EP910LC-40 |
|---|---|---|
| ブランド | Altera | Rochester Electronics |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $12.90 | $52.00 |
| Manufacturer | Altera (now Intel PSG) | Rochester Electronics (Altera original) |
| Product Family | Classic EPLD - EP910 series | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 4 |
| I/O Pins | 24 bidirectional | — |
| Maximum Logic Inputs | 36 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Technology | Low-power CMOS (L-suffix) | CMOS EPROM |
| 動作温度 | -40C to +85C (industrial, I-suffix) | — |
| パッケージ | PLCC-44 (J-lead, windowed ceramic) | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) |
| 実装タイプ | Surface Mount (socket-compatible) | — |
| Programmability | UV-erasable, JEDEC-standard algorithm | — |
| RoHS ステータス | Non-compliant (windowed ceramic PLCC, legacy) | Not applicable (legacy) |
| Lifecycle | Obsolete - replaced by MAX 7000 / MAX II CPLD family | — |
| Device Family | — | Altera Classic EPLD - EP910 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Logic Array Blocks | — | 2 (12 macrocells each) |
| Maximum Toggle Frequency (fMAX) | — | 25 MHz |
| User I/O Pins | — | 36 |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| Programming Method | — | Altera Logic Programmer (PLAD-J), 4-wire serial |
| Lead-Free Status | — | Not applicable |