EP910LI-40 vs EP910LC-40 비교
다음의 상세 나란히 비교: EP910LI-40 제조: Altera 및 EP910LC-40 제조: Rochester Electronics. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsolete사양 비교
| 파라미터 | EP910LI-40 | EP910LC-40 |
|---|---|---|
| 브랜드 | Altera | Rochester Electronics |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $12.90 | $52.00 |
| Manufacturer | Altera (now Intel PSG) | Rochester Electronics (Altera original) |
| Product Family | Classic EPLD - EP910 series | — |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | 4 |
| I/O Pins | 24 bidirectional | — |
| Maximum Logic Inputs | 36 | — |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Technology | Low-power CMOS (L-suffix) | CMOS EPROM |
| 동작 온도 | -40C to +85C (industrial, I-suffix) | — |
| 패키지 | PLCC-44 (J-lead, windowed ceramic) | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) |
| 실장 유형 | Surface Mount (socket-compatible) | — |
| Programmability | UV-erasable, JEDEC-standard algorithm | — |
| RoHS 상태 | Non-compliant (windowed ceramic PLCC, legacy) | Not applicable (legacy) |
| Lifecycle | Obsolete - replaced by MAX 7000 / MAX II CPLD family | — |
| Device Family | — | Altera Classic EPLD - EP910 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | — | 450 |
| Logic Array Blocks | — | 2 (12 macrocells each) |
| Maximum Toggle Frequency (fMAX) | — | 25 MHz |
| User I/O Pins | — | 36 |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| Programming Method | — | Altera Logic Programmer (PLAD-J), 4-wire serial |
| Lead-Free Status | — | Not applicable |